Xilinx® Zynq® UltraScale+? high memory bandwidth MPSoC module
Enclustra Mercury+? XU9 SoC module: 38.4 GByte/sec Memory bandwidth
(PresseBox) - Enclustra''s Mercury+ XU9 SoC module offers 20 multi-gigabit transceivers with data rates of up to 15 Gbit/sec each and memory bandwidth of up to 38.4 GByte/sec. Based on the Xilinx Zynq UltraScale+ MPSoC, the Mercury+ XU9 combines 6 ARM cores, a Mali-400MP2 GPU (EV variant), up to 12 GByte DDR4 SDRAM, numerous standard interfaces, 192 user I/Os and up to 504,000 LUT4 equivalents.
With the Mercury+ XU9 MPSoC module, FPGA specialist Enclustra presents the sixth SOM family based on the Zynq UltraScale+ MPSoC from Xilinx. To achieve the highest possible memory bandwidth, it is equipped with two memory banks: a 64-bit wide DDR4 SDRAM (up to 4 GBytes) connected to the PL and a 72-bit DDR4 ECC SDRAM (up to 8 GBytes) connected to the PS. Thus, the module achieves a memory bandwidth of up to 38.4 GByte/sec.
In order to transport the data to be processed into and out of the module as quickly as possible, 20 multi-gigabit transceivers with a data transmission rate of up to 15 Gbit/sec each are available.
In addition to the usual standard interfaces such as two Gigabit Ethernet and USB 3.0 ports, dedicated interfaces like DisplayPort, SATA, as well as SGMII are available on the 74
The Xilinx Zynq UltraScale+ MPSoC is manufactured in a 16 nm FinFET+ process and has 6 ARM
Reference design and Linux at the push of a button
Enclustra offers a broad design-in support for their products. With the Mercury+ PE1-300 or Mercury+ PE1-400 base boards, the Mercury+ XU9 can be a powerful development and prototyping platform.
Enclustra also offers a comprehensive ecosystem for the XU9, offering all required hardware, software and support materials. The Mercury+ PE1 base board is a complete development platform; detailed documentation and reference designs make it easy to get started, in addition to the user manual, user schematics, a 3D-model, PCB footprints and differential I/O length tables.
The Enclustra Build Environment can be used to compile Linux for the Enclustra SoC modules with integrated ARM processors very smoothly. The module and base board are selected by a graphical interface. After that, the Enclustra Build Environment downloads the appropriate Bitstream, First Stage Boot Loader (FSBL) and the required source code. Finally, U-Boot, Linux and the root file system based on BusyBox are compiled.
Thanks to the family concept with compatible connectors, different types of modules can be used on the same base board. If for example, an ARM processor is not required, the Mercury+ KX2 FPGA module can be used on the same base board instead.
Enclustra is an innovative and successful Swiss FPGA design company. With the FPGA Design Center, Enclustra provides services covering the whole range of FPGA-based system development: From high-speed hardware or HDL firmware through to embedded software, from specification and implementation through to prototype production.
In the FPGA Solution Center, Enclustra develops and markets highly-integrated FPGA modules and FPGA-optimized IP cores.
By specializing in forward-looking FPGA technology, and with broad application knowledge, Enclustra can offer ideal solutions at minimal expense in many areas. More information can be found at: www.enclustra.com
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Enclustra is an innovative and successful Swiss FPGA design company. With the FPGA Design Center, Enclustra provides services covering the whole range of FPGA-based system development: From high-speed hardware or HDL firmware through to embedded software, from specification and implementation through to prototype production.In the FPGA Solution Center, Enclustra develops and markets highly-integrated FPGA modules and FPGA-optimized IP cores.By specializing in forward-looking FPGA technology, and with broad application knowledge, Enclustra can offer ideal solutions at minimal expense in many areas. More information can be found at: www.enclustra.com
Datum: 27.08.2019 - 04:02 Uhr
Sprache: Deutsch
News-ID 1551671
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